Semiconductor storage apparatus in which different erase commands are sequentially sent to a plurality of nonvolatile semiconductor memories
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United States of America Patent
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app pub date -
Feb 25, 2004
filing date -
Jun 22, 1992
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Abstract
A semiconductor storage apparatus is coupled with a system bus to receive a write request accompanied with first and second blocks of data, which are stored in nonvolatile semiconductor memories. A control device sends a first erase command to one of the nonvolatile memories to initiate a first internal erase operation of data within the nonvolatile memories. After the first erase command has been sent, the control device sends a second erase command to another one of the nonvolatile memories, to initiate a second internal erase operation of data within the other nonvolatile memory.
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