Class II bus negative transient protection
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United States of America Patent
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Jun 13, 2006
Grant Date -
Aug 19, 2004
app pub date -
Sep 2, 2003
filing date -
Feb 14, 2003
priority date (Note) -
Expired
status (Latency Note)
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Abstract
To protect the class II integrated circuit bus from negative transients, the present invention uses a clamp circuit which is biased from the battery and referenced to ground as opposed to being biased and referenced to ground. Thus, the current path is not from ground to the bus pin. Instead, it is from the battery through a blocking diode, a transistor, a resistor and a plurality of diodes to the bus pin yet referenced to ground. In a preferred embodiment, the present invention consists of a transient protection circuit including a reference diode with its cathode connected to ground, a transistor biased as a current source having its output terminal operably connected to an anode of the reference diode, and at least a second diode operably connected between the anode of the reference diode and a bus pin, whereby the transistor supplies current when a module ground is intact.
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