Method of measuring the accuracy of a clock signal
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United States of America Patent
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Issued Date -
Aug 5, 2004
app pub date -
Jan 21, 2003
filing date -
Jan 21, 2003
priority date (Note) -
Abandoned
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Abstract
A circuit for measuring the accuracy of a clock signal comprising has a first digital phase locked loop receiving an input signal and providing an output signal and a second digital phase locked loop receiving at its input the output signal from the first phase locked loop. One or more measurement terminals are internally connected to one of the phase locked loops to provide a measurement signal.
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