Method for forming a wafer level chip scale package
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United States of America Patent
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N/A
Issued Date -
Jul 8, 2004
app pub date -
Jun 13, 2002
filing date -
Jun 13, 2001
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A layer of gold (405) is disposed on upper surfaces (225) of copper pillars (210) on a bumped wafer (205). Coating material (410) is then applied to a level which is less than the height of the copper pillars (210), and etchant is disposed to remove coating material on the layer of gold (405) and to remove coating material (410) adhering to side surfaces of the copper pillars (210). Solder deposits are then disposed on the gold layer and reflowed to form balls (405) on the ends of the copper pillars (210), with the copper pillars (210) protruding into the solder balls (405).
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