Method of filling a via or recess in a semiconductor substrate
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United States of America Patent
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Issued Date -
Jun 17, 2004
app pub date -
Sep 16, 2003
filing date -
Apr 26, 2001
priority date (Note) -
Abandoned
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Abstract
This invention relates to a method of filling a via or recess in a semiconductor substrate including: (i) depositing or forming a sacrificial layer on a functional dielectric layer, (ii) etching a via or recess through the sacrificial and functional layers; (iii) depositing metal onto the substrate by: (iv) lifting off or ablating the metal deposited on the surface of the sacrificial layers; (v) repeating steps (iii) and (iv) until the vias or recesses are at least full of metal; and (vi) removing any remaining sacrificial layer and any excess metal.
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