Apparatus and methods for programmable interfaces in memory controllers
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
May 20, 2004
app pub date -
Oct 4, 2001
filing date -
Oct 4, 2001
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
A memory controller includes a register and an interface circuitry. The register stores read timing-parameters for a memory. The interface circuitry communicates with the memory by providing a plurality of control signals to the memory. The control signals may include a chip-enable signal and a read-enable signal. The interface circuitry uses the read timing-parameters to provide the plurality of control signals. The relative timing of the plurality of control signals to one another depends at least in part on the read timing-parameters. The user can program the read timing-parameters in order to support and facilitate transactions with a variety of memory devices.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully