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• 15 United States
• 10 France
• 8 Japan
• 7 China
• 5 Korea
• 2 Other

Patent Owner(s)

Patent Owner	Address
APPLIED MATERIALS INC	3050 BOWERS AVENUE SANTA CLARA CA 95054

International Classification(s)

• H01L:SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICE....

• 2002 Application Filing Year
• H01L Class
• 14069 Applications Filed
• 7752 Patents Issued To-Date
• 55.10 % Issued To-Date

Inventor(s)

Inventor Name	Address	# of filed Patents	Total Citations
Jennings, Dean	Beverly, MA	71	7824
# of filed Patents : 71 Total Citations : 7824
Tallavarjula, Sairaju	Santa Clara, CA	11	88
# of filed Patents : 11 Total Citations : 88
Thakur, Randhir	San Jose, CA	83	7795
# of filed Patents : 83 Total Citations : 7795

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Patent Citation Ranking

• 20 Citation Count
• H01L Class

• 42.51 % this patent is cited more than
• 21 Age

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Maintenance Fees

Fee	Large entity fee	small entity fee	micro entity fee	due date

Fee	Large entity fee	small entity fee	micro entity fee
Surcharge after expiration - Late payment is unavoidable	$700.00	$350.00	$175.00
Surcharge after expiration - Late payment is unintentional	$1,640.00	$820.00	$410.00

DATE PUBLISHED	PUBLICATION/PATENT NO.	PUBLICATION TYPE
October 12, 2004	US,6803297,B2   US6803297B2	GRANTED PATENT AS SECOND PUBLICATION
March 25, 2004	US,20040058512,A1   US20040058512A1	FIRST PUBLISHED PATENT APPLICATION

Full Text

US Patent Application No: 2004/0058,512

Optimal spike anneal ambient

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Abstract

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A method for activating implanted dopants in a semiconductor substrate to form shallow junctions comprises the steps of: maintaining gas pressure in the processing chamber at a level significantly lower than atmospheric pressure, providing a flow of a carrier gas into the processing chamber, subjecting the substrate to a temperature treatment process, and introducing oxygen into the processing chamber during all or part of the temperature treatment process.

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Description

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Claims

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