Single chip multiprocessing microprocessor having synchronization register file
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United States of America Patent
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app pub date -
May 5, 2003
filing date -
Oct 22, 1998
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Abandoned
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Abstract
A single chip multiprocessing microprocessor having a synchronization register file is disclosed. This microprocessor includes a plurality of ILP (Instruction Level Parallelism) processors connecting through an internal bus, and a synchronization register file having a multiport so that the ILP processors concurrently access for thereby performing atomic instructions for thereby enhancing the performance of single chip multiprocessing microprocessor and a system using the same by processing atomic instruction without memory access when performing synchronization among internal processors. A single chip multiprocessing microprocessor having a synchronization register file is capable of enhancing the performance of a single chip multiprocessing microprocessor and a system using the same by configuring a system formed using a ring connection network capable of providing a high speed and high bandwidth using a uni-directional input/output separated ring interface apparatus as a chip external interface apparatus instead of a shared bus interface apparatus for thereby overcoming a bottleneck problem occurring in the system of a shared bus architecture.
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