Low-loss bipolar transistor and method of manufacturing the same
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United States of America Patent
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Issued Date -
Feb 12, 2004
app pub date -
Aug 6, 2002
filing date -
Aug 6, 2002
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Abandoned
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Abstract
A low-loss bipolar transistor comprising a collector layer composed of an n.sup.++ Si substrate and n.sup.- Si film, a base layer composed of a p-SiGe film, an emitter layer composed of an n.sup.+ Si film, a base electrode, an emitter electrode, a collector electrode, and an insulating material to coat the exposed surface including the junction boundary of the base layer and collector layer, wherein when a total length of contact boundary per unit area in the area where the emitter electrode and base electrode are adjacently arranged is assumed to be X (mm/cm.sup.2) and the dopant density of the emitter layer is assumed to be Y (atom/cm.sup.3), the expressions X.gtoreq.500 and Y.gtoreq.9.0.times.10.sup.18-3.2.times.10.sup.15 X are satisfied.
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