Scalable three-dimensional fringe capacitor with stacked via
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United States of America Patent
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Issued Date -
Dec 25, 2003
app pub date -
Jun 24, 2002
filing date -
Jun 24, 2002
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
Integrated fringe capacitor is structured in an IC with multi-layer metal layers sandwiched between a top metal plate and bottom plate. The multi-layers are cut into vertically aligned islands and the islands are connect series through metallized vias to either the top metal plate or the bottom metal plate. The columns connected to the top metal plate and the columns connected to the bottom metal plate are placed close to each other form the capacitor.
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