Logarithmic mode CMOS image sensor with reduced in-pixel fixed
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United States of America Patent
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N/A
Issued Date -
Dec 25, 2003
app pub date -
Aug 8, 2002
filing date -
Jun 20, 2002
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A logarithmic mode CMOS image sensor capable of eliminating in-pixel fixed pattern noise. The image sensor includes a first MOS transistor, a second MOS transistor, a third MOS transistor, a fourth MOS transistor, a photodiode and a current source. The gate terminal of the first MOS transistor and the first connection terminal are tied at a first node point. The first node point is connected to a terminal with the highest voltage in the circuit. The gate terminal of the second MOS transistor and the second connection terminal of the first MOS transistor are tied at a second node point. The first connection terminal of the second MOS transistor is also connected to the terminal with the highest voltage. The gate terminal of the third MOS transistor is tied to a row select signal terminal and the first connection terminal of the third MOS transistor is tied to the second terminal of the second MOS transistor. The second connection terminal of the third MOS transistor is a voltage output terminal. The gate terminal of the fourth MOS transistor is tied to a control signal terminal and the first connection terminal of the fourth MOS transistor is tied to the second node point. The first connection terminal of the photodiode is tied to the second connection terminal of the fourth MOS transistor and the second connection terminal of the photodiode is tied to a ground terminal. The first connection terminal of the current source is tied to the second connection terminal of the third MOS transistor and the second connection terminal of the current source is tied to a ground terminal.

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- 15 United States
- 10 France
- 8 Japan
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- 5 Korea
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Patent Owner(s)
Patent Owner | Address | |
---|---|---|
TWIN HAN TECHNOLOGY CO LTD | 3F NO 179 YUNG-CHI ROAD TAIPEI R O C |
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
King, Ya-Chin | Chungli, TW | 91 | 428 |
Lai, Liang-Wei | Banchiau City, TW | 3 | 5 |
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Maintenance Fees
Fee | Large entity fee | small entity fee | micro entity fee | due date |
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Fee | Large entity fee | small entity fee | micro entity fee |
---|---|---|---|
Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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