Apparatus of testing semiconductor
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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N/A
Issued Date -
Nov 13, 2003
app pub date -
Nov 15, 2002
filing date -
May 8, 2002
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
An apparatus and a method for testing a semiconductor that can be subjected to the total test in the state of the final product after sealing in the stage of the wafer test in the test of each of a plurality of semiconductor chips sealed together, and can improve the yield of final products. In the assembly step, another chip sealed together with a chip to be measured is mounted on a probe card, and the tester conducts the test of the chip to be measured through a probe needle connected to the chip to be measured. By transmitting a predetermined command, such as writing and/or reading, from a chip to be measured to another chip, the chip to be measured and the other chip are made to execute operations when these chips are sealed together in a package, and the tester is made to analyze the result of operations and to perform pass or fail judgment.
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