Wire-bonded chip on board package
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United States of America Patent
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N/A
Issued Date -
Nov 6, 2003
app pub date -
May 23, 2002
filing date -
May 1, 2002
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A wire-bonded chip on board package has a substrate including a first resin. A solder mask made of a second resin having a thermal expansion coefficient identical to that of the first resin of the substrate is disposed on the top surface of the substrate such that it has a smooth outer surface and some openings to expose the respective areas of the conductive patterns on the top surface. An IC chip with an inactive side thereof tightly attaches to the outer surface of the solder mask. Wire bonds electrically connect the contact pads formed on an active side of the IC chip to the conductive patterns of the top surface. A molding material encapsulates the chip, the wire bonds and the substrate top surface.
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