Method of metal electro-plating for IC package substrate

Number of patents in Portfolio can not be more than 2000

United States of America Patent

APP PUB NO 20030164303A1
SERIAL NO

10289312

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A method of metal-electro-plating for IC package substrate comprising the steps of: forming vias on the package substrate coated with copper film on both sides thereof; electro-plating the vias to form electrical conductive holes between the top layer and the bottom layer of the package substrate; coating a resisting agent where the patterns should be formed on the top layer and on the entire bottom layer of the package substrate; etching the pattern to form circuit without plating lines on the top layer of the substrate, and removing the resisting agent; coating with a resisting agent on the top side and the bottom side of the package substrate but the wiring position to be electro-plated as surface finish for wire-bonding electro-plating on the top side of the package substrate not being applied with the resisting agent; electro-plating the substrate with nickel and gold, and removing the resisting agent; fabricating the circuit on the bottom side of the package substrate and coating with a resisting agent to cover the entire top side and where the circuit is to be formed on the bottom side; etching the substrate to obtain the circuit on the bottom side of the package substrate; and coating solder resist on the region other than the circuit section and applying pre-flux onto the circuit section to form into a protective film.

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Patent Owner(s)

Patent OwnerAddress
ORIENT SEMICONDUCTOR ELECTRONICS LIMITEDN E P Z NO 9 CHUNG-SAN STREET KAO-HSIUNG

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Che-Chen Taipei, TW 1 5
Chiang, Chi-Ju Taipei, TW 1 5
chuang, Chin-Hui Taipei, TW 1 5
Huang, Fu-Yu Taipei, TW 12 48
Huang, Yu-Chun Taipei, TW 55 258
Hung, Pei-Fen Taipei, TW 1 5
Lee, Wei-Yin Taipei, TW 1 5
Lo, Shu-Hui Taipei, TW 2 13
Tseng, Ya-Shin Taipei, TW 1 5

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