Low dark current CMOS image sensor cell and array layout
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United States of America Patent
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Issued Date -
Jun 12, 2003
app pub date -
Feb 20, 2002
filing date -
Dec 7, 2001
priority date (Note) -
Abandoned
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Abstract
A complementary metal-oxide-semiconductor image sensor structure and associated layout method. A gate polysilicon layer of a reset transistor isolates the illumination region of an optical diode from field oxide layer corners of the image sensor so that current leaks between the illumination region and field oxide layer corners are minimized. Each side of the polysilicon layer also extends to and connects with a neighboring polysilicon layer. This expands the illumination region and increases fill factor of the layout.
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