Flexible caching of translated code under emulation
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United States of America Patent
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N/A
Issued Date -
May 15, 2003
app pub date -
Nov 14, 2001
filing date -
Nov 14, 2001
priority date (Note) -
Abandoned
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Abstract
Emulation of a guest computer architecture on a host system of another computer architecture. The guest computer architecture has programs composed of legacy instructions. To perform the emulation of the legacy instructions on the host system, the legacy instructions are accessed in the host system. Each particular legacy instruction is translated into one or more particular translated instructions for emulating the particular legacy instruction. RISC blocks translated from CISC blocks are held in system memory cache. The efficiency of translation of CISC blocks to RISC blocks in the cache is improved by using small-, equal-sized RISC blocks that are linked into a logical entity. The logical entity is a linked group of one or more RISC blocks logically linked for each CISC block. The logical links from one RISC block to another RISC block are implemented by a linked-list.
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