Computer system and method for communications between bus devices
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United States of America Patent
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N/A
Issued Date -
Apr 3, 2003
app pub date -
Sep 28, 2001
filing date -
Sep 28, 2001
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
Disclosed is a computer system and method for communications between devices in the computer system. The computer system comprises a global bus which includes a Transfer Acknowledge (TACK) wire and two Command Reject (CRJ) wires for notifying a master device of different situations after the master device sends a command or data octet (64 bits) to a target device. If the target device receives the octet, it toggles the TACK line. After that, if the target device accepts the command octet, it sends 00 on the two CRJ lines. But if it rejects the octet, it sends 01, 10, or 11 on the two CRJ lines indicating to the master device how long the master should wait before resending the octet. If the command octet is sent to a nonexistent target device, the TACK line does not toggle. The master recognizes this situation and acts accordingly.
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