Interface apparatus for integrated circuit testing
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United States of America Patent
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N/A
Issued Date -
Jan 16, 2003
app pub date -
Jul 9, 2001
filing date -
Jul 9, 2001
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
An apparatus and method for coupling a test head and probe card in an IC testing system incorporating patterned divider elements disposed between rows of signal conductors to provide matching characteristic impedance values along each row of signal conductors. The divider elements have a conductive layer formed thereon that is electrically connected to ground. Openings of various shapes and sized are formed in the conductive layer to adjust the characteristic impedance of a corresponding signal conductor. A method for determining the patterning required for characteristic impedance matching is also provided. Test dividers are provided with openings of different size, and characteristic impedance measurements are taken with the various openings aligned to a signal conductor. The size opening is then interpolated to provide a particular characteristic impedance value. By sizing the openings corresponding to each signal conductor for the same characteristic impedance value, characteristic impedance matching is provided.
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