Speculative branch target address cache
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
Dec 19, 2002
app pub date -
May 4, 2001
filing date -
May 4, 2001
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
A speculative branch target address cache (BTAC) in a microprocessor. The BTAC caches target addresses and other information about branch instructions, such as instruction length, location within an instruction cache line, and a direction prediction. The BTAC is indexed by a fetch address of the microprocessor's instruction cache to determine whether a BTAC hit occurs. The BTAC is accessed early in the pipeline in parallel with the instruction cache access prior to decoding any instructions in the indexed instruction cache line. If a hit occurs in the BTAC, and the BTAC direction prediction is taken, the microprocessor speculatively branches to the target address supplied by the BTAC. The branch is speculative because the instructions in the cache line have not yet been decoded; hence, there is no guarantee that the alleged branch instruction associated with the information cached in the BTAC is present in the instruction cache.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully