Method and structure for ex-situ polymer stud grid array contact formation

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United States of America Patent

APP PUB NO 20020140096A1
SERIAL NO

10112849

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Abstract

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A method and structure of ex-situ polymer stud grid array (ESWS-PSGA) contact formation on a semiconductor wafer having individual integrated circuit (IC) device areas. A large area of a polymer stud grid array (PSGA) field, including a polymer film, is pre-fabricated and then interconnected with the semiconductor wafer, and the ESWS-PSGA is formed using methods including laser structuring, compression molding, photolithographic-plasma etching, photolithographic processing, or adding material to the surface of the polymer film. The ESWS-PSGA has the PSGA field extend across the entire active surface of the semiconductor wafer, with metallized PSGA input/output (I/O) studs being disposed across the individual IC device areas. Alternatively, the ESWS-PSGA can be formed by spreading an extension of the polymer film beyond the perimeter of the semiconductor wafer, with metallized PSGA input/output (I/O) studs being disposed across the individual IC device areas. The extension provides temporary connection to an integrated circuit tester and/or an integrated circuit burn-in system, and may have studs for connecting to the tester.

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Patent Owner(s)

Patent OwnerAddress
SIEMENS DEMATIC AKTIENGESELLSCHAFTWERNER-VON-SIEMENS-STR 9 BRUCHSAL 76646

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Higgins, Leo M III Austin, TX 5 88

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