Multiplier circuit

Number of patents in Portfolio can not be more than 2000

United States of America Patent

APP PUB NO 20020138540A1
SERIAL NO

09873760

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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The invention relates to methods and apparatus that selectively multiply an analog signal by zero (0), one (1), and negative one (-1) at high speeds. In one embodiment, the analog signal corresponds to an integration result of a transition from a first data bit to a second data bit in a serial data bitstream. Advantageously, the multiplier circuit is well adapted to relatively high-frequency operation by providing a balanced load to a driver circuit such that the selected multipliers of the multiplier circuit can switch in a substantially symmetrical manner. In one embodiment, the driver circuit includes a data transition identifier circuit.

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Patent Owner(s)

Patent OwnerAddress
CONNECTCOM MICROSYSTEMS INC7545 IRVINE CENTER DRIVE SUITE 100 IRVINE CA 92618

International Classification(s)

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  • 2001 Application Filing Year
  • G06G Class
  • 521 Applications Filed
  • 205 Patents Issued To-Date
  • 39.35 % Issued To-Date
Click to zoom InYear of Issuance% of Matters IssuedCumulative IssuancesYearly Issuances20012002200320042005200620072008200920102011201220130255075100

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Enam, Syed K Mission Viejo, CA 18 127

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Patent Citation Ranking

  • 4 Citation Count
  • G06G Class
  • 2.63 % this patent is cited more than
  • 23 Age
Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges356316534111301 - 1011 - 2021 - 3031 - 4041 - 5051 - 6061 - 7071 - 8081 - 90100 +02.557.51012.51517.52022.52527.53032.53537.54042.54547.55052.55557.560

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