Electroplating methods for fabricating microelectronic interconnects
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United States of America Patent
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Issued Date -
Sep 26, 2002
app pub date -
Mar 23, 2001
filing date -
Nov 3, 2000
priority date (Note) -
Abandoned
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Abstract
Microelectronic interconnections are fabricated by forming a via in a first face of a microelectronic substrate that extends only partially through the microelectronic substrate towards a second face thereof. The via includes a sidewall and a floor. An insulating layer is formed on the sidewall. A plating electrode is formed on the second face. Metal is electroplated in the via from the floor by passing plating current between the plating electrode and the floor through the microelectronic substrate therebetween. The substrate then is thinned at the second face to expose the metal that was electroplated. Electroplated metal through-substrate interconnections thereby may be fabricated.
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