Packet based ATM CRC-32 calculator
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United States of America Patent
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N/A
Issued Date -
Sep 12, 2002
app pub date -
Mar 11, 2002
filing date -
Mar 9, 2001
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A method and apparatus for detecting errors in a data packet being transmitted as a set of smaller data cells by performing operations on the Cyclic Redundancy Check (CRC) values of the individual cells. An error detection apparatus initializes a memory area with a first value. The apparatus generates a CRC value for a first data cell. The apparatus combines the first value and the CRC value for the first cell in a XOR operation and the apparatus stores the result in a memory location. For subsequent cells in the data packet, the apparatus generates a cell CRC value, shifts the value in the memory location twelve times, and replaces the shifted value in the memory location with a new value generated from a XOR operation performed on the shifted value and the cell CRC value. The apparatus compares the final value in the memory location with an end comparison value and generates an error signal if the final and comparison values are different.
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