MOSFET and method of its fabrication
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United States of America Patent
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app pub date -
Nov 5, 2001
filing date -
Dec 9, 1996
priority date (Note) -
Abandoned
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Abstract
The invention relates to a MOSFET with a doped silicon source layer and a doped polycrystalline silicon gate layer and a doped silicon drain layer and to a method of fabricating the layers of such a transistors, in which an otherwise possible interaction between closely spaced layers or structural components of decreased size is eliminated or at least substantially reduced by incorporation in at least one layer of the MOSFET of an element from Group IV in a predetermined concentration.
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