Method and structure of in-situ wafer scale polymer stud grid array contact formation
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United States of America Patent
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Issued Date -
Sep 5, 2002
app pub date -
Feb 28, 2002
filing date -
Mar 1, 2001
priority date (Note) -
Abandoned
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Abstract
Methods and structures of in-situ wafer scale polymer stud grid array (ISWS-PSGA) contact formation on integrated circuit devices, wherein a separate pre-manufactured PSGA substrate is not needed. The methods include injection molding of thermoplastics, transfer-molding of thermoset materials, lamination of polymer films with subsequent in-situ molding/embossing, and forming the PSGA structure directly on the semiconductor wafer. The ISWS-PSGA structure extends across the entire semiconductor wafer, with ISWS-PSGA metallized input/output studs disposed across each of the integrated circuit devices on the wafer. The polymer formed on the wafer surface to create the stud field is extended beyond the perimeter of the wafer, and the polymer film extension is used for temporary connection to an integrated circuit tester, or an integrated circuit test/burn-in system. The extension may further include studs for contacting the tester.
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