Address converter, interleaver and de-interleaver
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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N/A
Issued Date -
Aug 22, 2002
app pub date -
Jan 22, 2002
filing date -
May 22, 2000
priority date (Note) -
Abandoned
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Abstract
An object of the present invention is to provide an interleaver and a deinterleaver, which are small-sized and power saving. An address converter ACON has three counters CNT1, CNT2 and CNT3 in associated with a first rank through a third rank and the outputs DO11, DO12 and DO13 of respective counters CNT1, CNT2 and CNT3 are inputted in lookup tables LUT1, LUT2 and LUT3. In the counter CNT3, a clock CK1 with a predetermined cycle is inputted and the numeric values of 'O' through '3' are repeatedly outputted. In the counter CNT2, a carry out CO3 to be outputted in synchronization with the output of the counter CNT3, i.e., 'O' is inputted as a clock CK2. Further, the counter CNT2 outputs the numeric values of 'O' through '4' repeatedly. In the counter CNT1, a carry out CO2 to be outputted in synchronization with the output of the counter CNT2, i.e., 'O' is inputted as a clock CK3. Further, the counter CNT1 outputs the numeric values of '0' through '15' repeatedly.
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