Device for supporting partial reading
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United States of America Patent
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N/A
Issued Date -
Jul 11, 2002
app pub date -
Feb 22, 2001
filing date -
Jan 11, 2001
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A device inside a chipset for supporting partial reading such that a central processing unit is able to determine the different bit access bandwidth of a plurality of peripheral devices and act accordingly. The device is constructed from a plurality of register groups. Each register group has a storage spacer for housing partial read base address bits, partial read enable bits, partial read transfer size bits, priority bits and partial read offset bits. These bits are used to record or determine conditions for executing a partial reading.
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