Method for fabricating a semiconductor device

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United States of America Patent

PATENT NO 6589861
APP PUB NO 20020081835A1
SERIAL NO

10015672

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Abstract

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A method for fabricating a semiconductor device includes sequentially forming a stopping layer, an intermetal dielectric, and a capping layer on an interlayer dielectric, selectively removing the capping layer, the intermetal dielectric, and the stopping layer to partially expose a surface of the interlayer dielectric to form a hole, selectively removing a side of the intermetal dielectric within the hole, depositing a metal film on an entire surface including the hole to form an air gap in a portion where the side of the intermetal dielectric is removed, and planarizing an entire surface of the metal film to expose a surface of the capping layer to form a plurality of metal lines.

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Patent Owner(s)

Patent OwnerAddress
HYNIX SEMICONDUCTOR INCSAN 136-1 AMI-RI BUBAL-EUP ICHEON GYEONGGI-DO ICHEON 467-701

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cho, Yun Seok Seoul, KR 5 84
Park, Chang Heon Seoul, KR 5 26

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