Method of processing a high voltage p++/n-well junction and a device manufactured by the method
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United States of America Patent
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Issued Date -
Jun 13, 2002
app pub date -
Sep 10, 2001
filing date -
Sep 8, 2000
priority date (Note) -
Abandoned
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Abstract
The present invention is related to a method of processing a high voltage p++/n-well junction on a substrate comprising at least one n-well region and at least one p-well region. The method comprises performing a p-type implantation in a zone surrounding said high voltage p++/n-well junction independently from other implantation.
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