Power saving feature during memory self-test
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
May 9, 2002
app pub date -
May 24, 2001
filing date -
May 31, 2000
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
A microcontroller is configured to interfaces with one or more dual in line memory modules (DIMMs) over an I.sup.2C bus and with a memory controller. The microcontroller efficiently retrieves configuration information from the DIMMs and provides it to the memory controller. During system power-up or reset, the memory configuration information, including power consumption parameters, is loaded by the microcontroller into the memory controller. The memory controller utilizes the power consumption parameters to control the rate at which built-in self test (BIST) operations are performed by the DIMMs, thereby conserving power.
First Claim
Family
International Classification(s)
- [Classification Symbol]
- [Patents Count]
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully