Method of testing memory device, method of manufacturing memory device, apparatus for testing memory device, method of testing memory module, method of manufacturing memory module, apparatus for testing memory module and method of manufacturing computer
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United States of America Patent
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N/A
Issued Date -
Apr 18, 2002
app pub date -
Dec 15, 2000
filing date -
Dec 17, 1999
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A memory test system can screen objects of tests accurately at low cost in quasi-operating conditions by utilizing a personal computer. The system utilizes a PC tester comprising a measurement PC unit that carries a memory module to be used as reference; a signal distribution unit for distributing the signal taken out from the measurement PC unit; a plurality of PFBs mounted with respective objected products to be observed simultaneously by using the signals distributed by the signal distribution unit; a display panel for displaying the current status of the test that is being conducted; a power source for producing the operating voltage of the system; and a control PC for controlling the selection of test parameters and various analytical operations. The PC tester is adapted to take out the signal from the chip set LSI on the PC mother board in the measurement PC unit to the individual memories on the memory module or the memory module per se and test them in quasi-operating conditions.
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