Semiconductor device with an integrated CMOS circuit with MOS transistors having silicon-germanium (Si1-xGex) gate electrodes, and method of manufacturing same
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United States of America Patent
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N/A
Issued Date -
Aug 23, 2001
app pub date -
Feb 15, 2001
filing date -
Feb 17, 2000
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
Semiconductor device comprising an integrated CMOS circuit with NMOS and PMOS transistors (A, B) having semiconductor zones (23, 24, 29, 30) formed in a silicon substrate (1). At the locations of the gate zones (29, 30), the surface (3) of the substrate is provided with a layer of gate oxide (11) on which gate electrodes (16, 17) are formed. The gate electrodes (17) of the PMOS transistors (B) are formed in a layer of p-type doped polycrystalline silicon (14) and a layer of p-type doped polycrystalline silicon-germanium(13) (Si.sub.1-xGe.sub.x; 0
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