Trimming procedure and code reuse for highly precise DC-DC converters
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United States of America
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Apr 1, 2025
Grant Date -
May 9, 2024
app pub date -
Nov 3, 2022
filing date -
Nov 3, 2022
priority date (Note) -
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status (Latency Note)
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Abstract
A converter system includes a reference buffer buffering a reference input to produce a DAC reference, operating from a reference feedback voltage generated by a reference divider. A tail buffer generates a tail voltage from an input voltage generated from the DAC reference by a tail divider. An R-2R type DAC utilizes an R-2R ladder to generate a DAC output from a code. This ladder has a tail resistor coupled to the tail voltage. A feedback buffer buffers the DAC output to produce a converter reference. A DC-DC converter generates a DC output from a DC input, based upon a converter feedback voltage. A feedback divider coupled between the DC output and the converter reference generates the converter feedback voltage. Control circuitry selectively taps the reference divider to produce the reference feedback voltage (performing gain trimming) and selectively taps the tail divider to produce the input voltage (performing offset trimming).
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International Classification(s)
- 2022 Application Filing Year
- H02M Class
- 2691 Applications Filed
- 1416 Patents Issued To-Date
- 52.62 % Issued To-Date
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