Methods for increasing cache hit rates for neural networks

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 12265908
APP PUB NO 20220067508A1
SERIAL NO

17008360

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Abstract

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Systems, apparatuses, and methods for achieving higher cache hit rates for machine learning models are disclosed. When a processor executes a given layer of a machine learning model, the processor generates and stores activation data in a cache subsystem a forward or reverse manner. Typically, the entirety of the activation data does not fit in the cache subsystem. The processor records the order in which activation data is generated for the given layer. Next, when the processor initiates execution of a subsequent layer of the machine learning model, the processor processes the previous layer's activation data in a reverse order from how the activation data was generated. In this way, the processor alternates how the layers of the machine learning model process data by either starting from the front end or starting from the back end of the array.

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Patent Owner(s)

Patent OwnerAddress
ADVANCED MICRO DEVICES INC2485 AUGUSTINE DRIVE SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Panday, Ashish Markham, CA 1 0
Sakharshete, Swapnil San Diego, US 14 165
Sander, Benjamin Thomas Austin, US 16 275

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