Dynamic interface circuit to reduce power consumption
Number of patents in Portfolio can not be more than 2000
United States of America
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Apr 1, 2025
Grant Date -
Mar 14, 2024
app pub date -
Feb 28, 2023
filing date -
Feb 28, 2023
priority date (Note) -
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Abstract
A system for a given device may include a plurality of systems on a chip (SOCs). Each SOC may include an interface circuit and a bridge circuit for communicating with other SOCs. The interface circuit of an SOC may include a plurality of communication devices to transfer data packets from/to the SOC to the other SOCs. The bridge circuit may provide various control functions for the interface circuit. An indication may be generated when the system enters an idle mode. In response, the bridge circuit may generate signal(s) to cause some of the communication devices of the interface circuit into a low power state. The interface circuit may obtain the signal(s) and accordingly transition some of the communication devices to the low power state.
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