Semiconductor structure preparation method, semiconductor structure and semiconductor memory

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 12262525
APP PUB NO 20230031509A1
SERIAL NO

17668661

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Abstract

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Provided are a method for preparing a semiconductor structure, a semiconductor structure and a semiconductor memory. The method includes the following operations. An initial semiconductor structure is formed on a substrate. The initial semiconductor structure is etched to form an array area structure and a peripheral area structure including a peripheral area gate structure. An isolation wall surrounding the peripheral area gate structure is formed on the substrate where the peripheral area structure locates. A second dielectric layer is deposited on the peripheral area gate structure including the isolation wall and on the array area structure. The second dielectric layer, the first dielectric layer and the isolation wall are etched to form the semiconductor structure with a flat surface.

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Patent Owner(s)

Patent OwnerAddress
CHANGXIN MEMORY TECHNOLOGIES INCROOM 630 HAIHENG BUILDING NO 6 CUIWEI ROAD ECONOMIC AND TECHNOLOGICAL DEVELOPMENT ZONE HEFEI ANHUI 230000

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Li, Xiaojie Hefei, CN 66 161
Yuan, Pan Hefei, CN 4 0

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