Manufacturing method of semiconductor structure

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United States of America

PATENT NO 12261149
APP PUB NO 20230402426A1
SERIAL NO

17874332

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Abstract

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A manufacturing method of a semiconductor structure including the following steps is provided. A first substrate is provided. A first dielectric structure is formed on the first substrate. At least one first cavity is formed in the first dielectric structure. A first stress adjustment layer is formed in the first cavity. The first stress adjustment layer covers the first dielectric structure. A second substrate is provided. A second dielectric structure is formed on the second substrate. At least one second cavity is formed in the second dielectric structure. A second stress adjustment layer is formed in the second cavity. The second stress adjustment layer covers the second dielectric structure. The first stress adjustment layer and the second stress adjustment layer are bonded.

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Patent Owner(s)

Patent OwnerAddress
POWERCHIP SEMICONDUCTOR MANUFACTURING CORPORATIONNO 18 LI-HSIN RD 1 HSINCHU SCIENCE PARK HSINCHU

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Huo, Yu-Chun Hsinchu County, TW 2 0
Lee, Shih-Ping Hsinchu, TW 59 483
Shen, Shih-Hsorng Hsinchu, TW 7 7
Su, Chih-Wei Hsinchu, TW 16 58

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