Method for integrating high-voltage (HV) device, medium-voltage (MV) device, and low-voltage (LV) device

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United States of America

PATENT NO 12261086
APP PUB NO 20230197523A1
SERIAL NO

17586699

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Abstract

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A method for fabricating a semiconductor device includes first providing a substrate having a high-voltage (HV) region, a medium-voltage (MV) region, and a low-voltage (LV) region, forming a HV device on the HV region, and forming a LV device on the LV region. Preferably, the HV device includes a first base on the substrate, a first gate dielectric layer on the first base, and a first gate electrode on the first gate dielectric layer. The LV device includes a fin-shaped structure on the substrate, and a second gate electrode on the fin-shaped structure, in which a top surface of the first gate dielectric layer is even with a top surface of the fin-shaped structure.

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Patent Owner(s)

  • UNITED MICROELECTRONICS CORP.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Chin-Hung Tainan, TW 71 530
Chiu, Chun-Ya Tainan, TW 38 111
Fu, Ssu-I Kaohsiung, TW 142 1041
Hsu, Chia-Jung Tainan, TW 104 506
Hsu, Chih-Kai Tainan, TW 113 491
Lin, Chien-Ting Tainan, TW 226 2214
Lin, Yu-Hsiang New Taipei, TW 161 478

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