Signal input buffer for effectively calibrating offset
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United States of America
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Mar 25, 2025
Grant Date -
Oct 12, 2023
app pub date -
Jan 20, 2023
filing date -
Jan 20, 2023
priority date (Note) -
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Abstract
A signal input buffer includes 1-st and 2-nd buffering blocks; a 1-st input switching block; a 2-nd input switching block; a 1-st output switching block; and a 2-nd output switching block. The signal input buffer buffers a reception signal pair and generates a buffered signal pair, and is capable of operation in a normal mode and a calibration mode, the reception signal pair includes an intrinsic reception signal and a complementary reception signal, the buffered signal pair includes an intrinsic buffered signal and a complementary buffered signal, and the calibration mode includes a 1-st calibration period and a 2-nd calibration period.
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