Clock monitor

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 12255655
APP PUB NO 20220407506A1
SERIAL NO

17344775

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Abstract

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A clock monitor circuit detects departures from expected values for clock period, clock high time duration, or clock low time duration. A delay line of the clock monitor circuit is composed of delay portions of delay cells. Each delay cell also has a comparator portion with logic to compare aspects of the monitored clock signal to corresponding expected values, and to output a failure detection signal indicating whether the expected values are met. Expected values may be read from a fuse set. The delay of the delay line may be programmatically adjusted. The clock monitor circuit may be combined with a circuit that detects narrow glitches in the monitored clock signal. Devices and systems with one or more monitored clock signals, and methods of clock signal monitoring, are also described.

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Patent Owner(s)

  • MICROSOFT TECHNOLOGY LICENSING, LLC.

International Classification(s)

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  • 2021 Application Filing Year
  • H03K Class
  • 2358 Applications Filed
  • 1507 Patents Issued To-Date
  • 63.92 % Issued To-Date
Click to zoom InYear of Issuance% of Matters IssuedCumulative IssuancesYearly Issuances202120222023202420250255075100

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fiedler, Alan Scott Santa Barbara, US 1 4

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Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges8870050100150200250300350400450500550600650700750800850900950

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