Gate drivers for stacked transistor amplifiers

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 12255587
APP PUB NO 20240039479A1
SERIAL NO

18447207

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Abstract

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Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are possible where the amplifier is configured to operate in at least an active mode and a standby mode. Circuital arrangements can reduce bias circuit and stacked transistors standby current during operation in the standby mode and to reduce impedance presented to the gates of the stacked transistors during operation in the active mode while maintaining voltage compliance of the stacked transistors during both modes of operation.

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Patent Owner(s)

  • PSEMI CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bargroff, Keith San Diego, US 60 721
Englekirk, Robert Mark Littleton, US 96 1663
Pal, Kashish Reading, GB 26 228
Ranta, Tero Tapio San Diego, US 114 1692
Wagh, Poojan Sleepy Hollow, US 20 423
Willard, Simon Edward Irvine, US 76 711

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