Boundary design for high-voltage integration on HKMG technology

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United States of America

PATENT NO 12255207
APP PUB NO 20240088154A1
SERIAL NO

18515912

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Abstract

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The present disclosure relates to an integrated circuit (IC) that includes a boundary region defined between a low voltage region and a high voltage region, and a method of formation. In some embodiments, the integrated circuit comprises an isolation structure disposed in the boundary region of the substrate. A first polysilicon component is disposed directly on an upper surface of the substrate alongside the isolation structure. A boundary dielectric layer is disposed on the isolation structure. A second polysilicon component is disposed on the sacrifice dielectric layer.

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Patent Owner(s)

  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Jhih-Bin Hsinchu, TW 25 18
Chen, Yi-Huan Hsin Chu, TW 65 94
Chou, Chien-Chih New Taipei, TW 90 310
Hsiao, Shih-Chung New Taipei, TW 3 0
Kalnitsky, Alexander San Francisco, US 283 2681
Liu, Ming Chyi Hsinchu, TW 149 514
Thei, Kong-Beng Pao-Shan Village, TW 240 3239

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