Self-biased, closed loop, low current free running oscillator

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 12249957
APP PUB NO 20240113660A1
SERIAL NO

18296539

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Abstract

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A self-biased, closed loop, low current free running oscillator clock generator method and apparatus are provided with a current mode comparator connected to a trimming resistor and configured to compare an internally generated voltage reference VREF signal to a voltage feedback signal VFB, where the current mode comparator comprises a common gate amplifier connected to a current mirror circuit in a negative self-biased closed loop to generate a control current signal for controlling a current controlled oscillator to produce an output clock signal having a clock frequency based on the control current signal, where a frequency-to-voltage converter is connected in a feedback path to receive the output clock signal and is configured to produce the voltage feedback signal VFB for input to the current mode comparator, wherein the clock frequency of the output clock signal is tuned to a nominal locked output frequency fOUT by the trimming resistor.

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Patent Owner(s)

  • NXP USA, INC.

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Iqbal, Sadique Mohammad Karimganj, IN 2 0
Malakar, Pragya Priya Chandler, US 2 0
Pigott, John Phoenix, US 41 61
Srivastava, Anubhav Gorakhpur, IN 17 47
Thakur, Krishna GautamBudh Nagar, IN 29 122
Tripathi, Divya Noida, IN 19 106

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