On-die termination of address and command signals

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 12249399
APP PUB NO 20250037746A1
SERIAL NO

18680395

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Abstract

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A memory device includes a set of inputs, and a first register that includes a first register field to store a value for enabling application of one of a plurality of command/address (CA) on-die termination (ODT) impedance values to first inputs that receive the CA signals; and a second register field to store a value for enabling application of one of a plurality of chip select (CS) ODT impedance values to a second input that receives the CS signal. A third register field may store a value for enabling application of a clock (CK) ODT impedance value to third inputs that receive the CK signal.

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Patent Owner(s)

  • RAMBUS INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Oh, Kyung Suk Cupertino, US 119 1101
Shaeffer, Ian Los Gatos, US 152 1888

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