Alias rejection in analog-to-digital converters (ADCs)

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 12244322
APP PUB NO 20240097694A1
SERIAL NO

17932572

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Abstract

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Techniques and apparatus for alias rejection in analog-to-digital converters (ADCs), in which only a portion of the ADC is operated at a higher sampling rate than other portions of the ADC, thereby preventing aliasing, but saving power. One example ADC circuit generally includes a first circuit portion configured to operate at a first clock rate equal to a sampling rate of the ADC circuit; and a second circuit portion configured to operate at a second clock rate higher than the sampling rate of the ADC circuit.

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Patent Owner(s)

  • QUALCOMM INCORPORATED

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Sedighi, Behnam La Jolla, US 25 55

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