Processors, methods, systems, and instructions to support live migration of protected containers

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 12242391
APP PUB NO 20240184717A1
SERIAL NO

18378124

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Importance

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Abstract

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A processor includes a decode unit to decode an instruction that is to indicate a page of a protected container memory, and a storage location outside of the protected container memory. An execution unit, in response to the instruction, is to ensure that there are no writable references to the page of the protected container memory while it has a write protected state. The execution unit is to encrypt a copy of the page of the protected container memory. The execution unit is to store the encrypted copy of the page to the storage location outside of the protected container memory, after it has been ensured that there are no writable references. The execution unit is to leave the page of the protected container memory in the write protected state, which is also valid and readable, after the encrypted copy has been stored to the storage location.

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Patent Owner(s)

  • INTEL CORP.

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Alexandrovich, Ilya Yokneam Illit, IL 45 810
Anati, Ittai Ramat Hasharon, IL 89 1768
Chakrabarti, Somnath Portland, US 32 662
Johnson, Simon P Beaverton, US 65 1552
Leslie-Hurd, Rebekah M Portland, US 28 374
McKeen, Francis X Portland, US 137 3945
Neiger, Gilbert Portland, US 300 7500
Rozas, Carlos V Portland, US 111 3554
Scarlata, Vincent R Beaverton, US 95 2230
Shanbhogue, Vedvyas Austin, US 230 2565
Vij, Mona Hillsboro, US 50 820
Zmudzinski, Krystof C Forest Grove, US 44 878

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