Memory device, memory system having the same, and method of operating the same
Number of patents in Portfolio can not be more than 2000
United States of America
Stats
-
Feb 25, 2025
Grant Date -
Jun 15, 2023
app pub date -
Jun 29, 2022
filing date -
Jun 29, 2022
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A memory device includes a memory cell array having memory cells connected to wordlines and bitlines, and a clock buffer receiving a clock signal for performing a read operation or a write operation on at least one of the memory cells. The clock buffer includes a plurality of serially connected clock repeaters, and the plurality of clock repeaters have at least one pair of clock repeaters having different imbalanced driving capabilities.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully