Read and programming decoding system for analog neural memory

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United States of America

PATENT NO 12237011
APP PUB NO 20230018166A1
SERIAL NO

17853315

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Abstract

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Various examples of decoders and physical layout designs for non-volatile flash memory arrays in an analog neural system are disclosed. In one example, a system comprises a plurality of vector-by-matrix multiplication arrays in an analog neural memory system, each vector-by-matrix multiplication array comprising an array of non-volatile memory cells organized into rows and columns, wherein each memory cell comprises a word line terminal; a plurality of read row decoders, each read row decoder coupled to one of the plurality of vector-by-matrix multiplication arrays for applying a voltage to one or more selected rows during a read operation; and a shared program row decoder coupled to all of the plurality of vector-by-matrix multiplication arrays for applying a voltage to one or more selected rows in one or more of the vector-by-matrix multiplication arrays during a program operation.

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Patent Owner(s)

Patent OwnerAddress
SILICON STORAGE TECHNOLOGY INC450 HOLGER WAY SAN JOSE CA 95134

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hong, Stanley San Jose, US 98 237
Ly, Anh San Jose, US 128 620
Nguyen, Kha Ho Chi Minh, VN 56 424
Pham, Hien Ho Chi Minh, VN 26 74
Tran, Han Ho Chi Minh, VN 16 172
Tran, Hieu Van San Jose, US 354 3483
Trinh, Stephen San Jose, US 62 144
Vu, Thuan San Jose, US 117 299

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