Systems and methods for digital signal synthesis with variable sample rate DAC
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United States of America
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Feb 18, 2025
Grant Date -
N/A
app pub date -
Feb 24, 2023
filing date -
Feb 24, 2023
priority date (Note) -
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status (Latency Note)
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Abstract
Systems and methods for digital signal synthesis with variable sample rate digital-to-analog converters (DACs) in accordance with various embodiments of the invention are described. One embodiment includes a digital frequency generator that includes a direct digital frequency synthesizer (DDFS); a digital-to-analog converter (DAC); a frequency/phase estimation circuit; a stable reference clock (REF CLK); a variable frequency sample clock; a frequency control word (FCW); where the DAC is sampled by the variable frequency sample clock; where the DDFS is clocked by the variable frequency sample clock; where the frequency/phase estimation circuit receives as inputs the stable REF CLK and the variable frequency sample clock and estimates a FCW frequency error and adjusts the FCW to the DDFS; where the DDFS receives the FCW and outputs a digital sine codeword at the variable frequency sample clock to the DAC, where the FCW to the DDFS is continuously adjusted to track the variable frequency sample clock.
First Claim
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International Classification(s)
- 2023 Application Filing Year
- H04L Class
- 23385 Applications Filed
- 8023 Patents Issued To-Date
- 34.31 % Issued To-Date
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- H04L Class
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