Oversampled analog to digital converter
Number of patents in Portfolio can not be more than 2000
United States of America
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Feb 18, 2025
Grant Date -
Oct 5, 2023
app pub date -
Jul 27, 2022
filing date -
Jul 27, 2022
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Abstract
An ADC includes a comparator to provide a comparator output responsive to an input voltage of the ADC and a DAC output voltage; a SAR circuit including a SAR that stores an n-bit digital code that is initialized at a beginning of a conversion phase of the ADC, where the SAR circuit is to update the digital code responsive to the comparator output, where an ADC output is responsive to the digital code at an end of the conversion phase; and a DAC to provide the DAC output voltage responsive to the digital code and a reference voltage. The DAC includes an m-bit CDAC and an (n−m)-bit RDAC to provide an intermediate voltage responsive to the n−m least-significant bits of the digital code and the reference voltage. The CDAC provides the DAC output voltage responsive to the m most-significant bits of the digital code, the intermediate voltage, and reference voltage.
First Claim
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- 15 United States
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Patent Owner(s)
Patent Owner | Address | |
---|---|---|
TEXAS INSTRUMENTS INCORPORATED | 12500 TI BOULEVARD M/S 3999 DALLAS TX 75243 |
International Classification(s)

- 2022 Application Filing Year
- H03M Class
- 1388 Applications Filed
- 948 Patents Issued To-Date
- 68.30 % Issued To-Date
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Gupta, Amit Kumar | Frisco, US | 96 | 835 |
# of filed Patents : 96 Total Citations : 835 |
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